Jean-Luc Gaudiot

Picture of Jean-Luc Gaudiot
Distinguished Professor, Electrical Engineering and Computer Science
The Henry Samueli School of Engineering
PH.D., University of California, Los Angeles
Phone: (949) 824-5689
Fax: (949) 824-3779
Email: gaudiot@uci.edu
University of California, Irvine
Department of Electrical Engineering and Computer Science
Engineering Tower 305
Mail Code: 2625
Irvine, CA 92697
Research Interests
Computer Architecture,microarchitecture,memory and communication systems,multiprocessor design,parallel processing and programming,reconfigurable architectures,design and implementation of artificial neural networks
Awards and Honors
IEEE and AAAS Fellow
Short Biography
Professor Jean-Luc Gaudiot received the Diplôme d'Ingénieur from the École Supérieure d'Ingénieurs en Electronique et Electrotechnique, Paris, France in 1976 and the M.S. and Ph.D. degrees in Computer Science from the University of California, Los Angeles in 1977 and 1982, respectively.
He is currently Distinguished Professor in the Electrical Engineering and Computer Science Department at the University of California, Irvine where he was department Chair from 2003 to 2009. During his tenure, the department underwent significant changes. These include the hiring of twelve new faculty members (three senior professors) and the remarkable rise in the US News and World Report® rankings of both the Computer Engineering program and the Electrical Engineering program.
Prior to joining UCI in January 2002, he was a Professor of Electrical Engineering at the University of Southern California since 1982, where he served as Director of the Computer Engineering Division for three years. He has also designed distributed microprocessor systems at Teledyne Controls, Santa Monica, California (1979-1980) and performed research in innovative architectures at the TRW Technology Research Center, El Segundo, California (1980-1982). He frequently acts as consultant to companies that design high-performance computer architectures, and has served as an expert witness in patent infringement and product liability cases. His research interests include programmability of parallel systems, hardware computer security, and design of Autonomous Driving Systems. He has published nearlyt 300 journal and conference papers. His research has been sponsored by NSF, DoE, and DARPA, as well as a number of industrial organizations.
From 2006 to 2009, he was the first Editor-in-Chief of the IEEE Computer Architecture Letters, a new publication of the IEEE Computer Society, which he helped found to the end of facilitating short, fast turnaround of fundamental ideas in the Computer Architecture domain. From 1999 to 2002, he was the Editor-in-Chief of the IEEE Transactions on Computers. In June 2001, he was elected chair of the IEEE Technical Committee on Computer Architecture, and re-elected in June 2003 for a second two-year term. In 2009, he was elected to the Board of Governors of the IEEE Computer Society for a 3-year-term. He was the Chair of the IEEE Computer Society Publications Board Transactions Operations Committee (2010-2011), the Chair of the IEEE Computer Society Publications Board Magazines Operations Committee in 2012, the IEEE Computer Society vice President, Educational Activities Board in 2013, and 2014-2015 IEEE Computer Society vice President, Publications Board. He served as the 2017 IEEE Computer Society President.
Dr. Gaudiot is a member of AAAS, ACM, and IEEE. He has also chaired the IFIP Working Group 10.3 (Concurrent Systems). He was co-General Chairman of the 1992 International Symposium on Computer Architecture, Program Committee Chairman of the 1993 IFIP Working Conference on Architectures and Compilation Techniques for Fine and Medium Grain Parallelism, the 1993 IEEE Symposium on Parallel and Distributed Processing (Systems Track), the 1995 Parallel Architectures and Compilation Techniques Conference (PACT ‘95), the High Performance Computer Architecture conference in 1999 (HPCA-5), and the 2005 International Parallel and Distributed Processing Symposium.
In 1999, he became a Fellow of the IEEE, “For Contributions to the Programmability and Reliability of Dataflow Architectures.” He was elevated to the rank of AAAS Fellow in 2007, “For Distinguished Contributions to the Design and Analysis of Highly Efficient Multiprocessor and Memory System Architectures.”
In his spare time, Dr. Gaudiot combines his passion for aviation with his love for teaching and he is an active flight instructor (both primary and instrument).
Professional Societies
IEEE Computer Society, IEEE Technical Committee on Computer Architecture
ACM
AAAS
Last updated
01/22/2023