Henry P. Lee


Associate Professor, Electrical Engineering and Computer Science
The Henry Samueli School of Engineering

PH.D., University of California, Berkeley

Phone: (949) 824-3148
Fax: (949) 824-3732
Email: hplee@uci.edu

University of California, Irvine
2200 EG
Mail Code: 2625
Irvine, CA 92697
Research Interests
Semiconductor Materials and Devices, Optoelectronics
URL
Research Abstract
Growth of Group III-V and IV Semiconductor Thin Films by Molecular Beam Epitaxy
Investigator: H.P. Lee
Research Associates: X. Liu and F. Szalkowski
Research Assistants: J. Juniper and D. Sato
Support: Grumman Space and Electronics
Irvine Faculty Research Grant
Thermionics Laboratory
University of California MICRO Program

This project is aimed at integrating epitaxial growth/deposition capabilities of Group IV semiconductors (Si, Ge, and C) within a III-V molecular beam epitaxy (MBE) system, with a long-term goal of realizing devices (heterojunction bipolar transistors, surface emitting lasers, infrared detectors, etc.) based on this unique capability. Epitaxial growth of Group IV elements is made possible by attaching a newly developed, compact rod-fed electron-beam system. Two of the e-guns already have been installed in an appropriate geometrical configuration such that all growths will occur at a common substrate position and can be monitored using reflection high energy electron diffraction (RHEED). The control of layer thickness for both III-V and IV semiconductors can be varied continuously from the SiGe alloys and C, as well as the binary, tertiary, and quarternary III-V compaounds achievable using Ga Al, In As, Sb sources. Thus far, the apparatus has demonstrated the growth of GaAs-Si alloys on a Si substrate for novel GaAs on Si heterepitaxy. Compared to existing techniques, this added capability significantly reduces the Group IV deposition time, thus offering a practical method for the growth of complicated (III-V)-IV heterovalent alloys and superlattices. Research projects currently under investigation include: Si and C delta-doping and III-V on Si heteroepitaxy.

InSb Infrared Detector Material Growth on Silicon Substrates
Investigator: H.P. Lee
Research Assistant: D. Sato
Support: Caltest Corp.
Grumman Electronics and Space
University of California MICRO Program

Bulk indium antimonide (InSb) has been used widely in Focal Plane Arrays (FPAs) for infrared detection in the 3-5 æm spectral range. If the InSb detectors can be grown directly on a silicon (Si) substrate which has been preprocessed to contain the appropriate readout circuitry, the cost of packaging the device will be reduced greatly and the yield and reliability improved significantly. Recent advances in the growth of gallium arsenide (GaAs) on silicon suggest the InSb/Si heteroepitaxy may be feasible. The foremost challenge for InSb/Si technology lies in the 19% lattice constant mismatch between the two materials. The lattice mismatch can cause a high density of threading dislocations in the epitaxial InSb layer, resulting in poor device performance. The dislocation density can be reduced by using a GaAs buffer layer (GaAs has a lattice constant intermediate to Si and InSb) or using a strained-layer superlattice buffer. Results from HgCdTe diodes on Si and sapphire using GaAs and CdTe buffer layers have been promising. The control of threading dislocations in heteroepitaxial III-V films on Si substrates (especially the GaAs/Si system) has been studied extensively in the past 8 years. Most of the dislocation reduction schemes developed depend on the control of dislocation structures and their interaction. In this study, the researchers will extend the control of dislocations by: (1) using the migration enhanced epitaxy (MEE) technique of Molecular Beam Epitaxy (MBE) during the initial stage of growth and (2) using buffer layers consisting of (III-V)-IV alloys such as (InSb)1x(Si2)x so that the lattice constant between InSb and Si can vary. The researchers have successfully used MEE growth in the GaAs/Si system and achieved significant progress in controlling the dislocation structure at the heterointerface; similar studies will be performed on the InSb/Si system. The deposition of (InSb)1-x(Si2)x alloys is made possible through the use of a novel electron-beam evaporation source currently being developed at UCI which allows the integration of Group IV element growth in the standard substrate position of a III-V MBE system.

Novel Optical Signal Processing via Tapped Delay Lines
Investigator: H.P. Lee
Research Assistant: E. Ranalli
Support: Newport-Klinger
University of California MICRO Program

The researchers are exploring applications of active and passive optical tapped delay line structures (fibers or waveguides) for optical signal processing. Two projects are being pursued actively. The first, a non-scanning narrowband optical spectrum analyzer, has demonstrated an angular dispersion of 3.6 degrees/Ghz, which is about five orders of magnitude greater than that obtainable using conventional gratings. As a result, the goal is to demonstrate temporal processing, via spatial filtering of optical signals with bandwidths in the MHz range. Such capabilities are unprecedented for conventional optical processors employing grating-based spectral techniques. Secondly, the researchers currently are simulating active tapped delay line structures (so-called pseudo-noise etalons) for generation and matched filtering of optical carrier waveforms which are appropriate for code-division multiple access (DCMA) fiber-optic communications. These simple devices can be implemented using currently available technology (fiber or integrated optics) and should produce code-addressable sets of waveforms exhibiting a high degree of orthogonality and thereby eliminating the prohibitive timing constraints encountered in comparable direct sequence CDMA techniques.
Last updated
02/22/2002